A multiprocessor system may include two or more computer processors which may work together on a single program. Each processor may have its own cache memory which is separate from the larger system (or main) memory. A cache memory may be a portion of memory made of high-speed static random access memory (SRAM). Many programs may access the same data or instructions repeatedly. By keeping as much of this information as possible in the cache, the system may avoid accessing the slower system memory.
Cache coherency protocols may be employed to manage the caches of a multiprocessor system to prevent data from being lost or overwritten before the data is transferred from a cache to the system memory or from a cache to another cache. For example, in a system employing a snooping protocol, such as the MSI protocol, caches on the bus may monitor (or snoop) the bus to determine if they have a copy of the block of data requested on the bus. The caches may modify the state of a memory block they contain in a cache line from, e.g., modified (M) or dirty, shared (S), or invalid (I), in response to read or write operations taken by other caches on the bus.